
FPGA is a powerfull hardware which can be used as ASIC prototype at the very begining of SOC projects. This document will introduce this techknowledge as following outline.
Outline
- FPGA Structure
- LUT, BlockRAM, DSP, IO, Clock
- Prototype Flow
- Synplify synthesis
- Vivado implement
- Hardware debug
FPGA Structure
LUT resource
Block RAM & Distributed RAM
DSP slice
IO pad
Clocking tree
FPGA Prototype Flow
Intro
Basic flow
RTL modify
Synplify synthesis
Vivado implement
Hardware debug
Conclusion
For large ASIC prototype, this flow can speed up the iteration time.




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